SoC IP and System Applications

About the role

TylSemi is looking for a IP and Systems Application Engineer who can sit at the intersection of silicon, IP, and customer success. You will own the operational thread that connects our stretagic initiatives to customers — making sure every engagement moves with precision from idea to silicon.

This is a high-visibility, high-ownership role at a company in its earliest and most consequential stage. You will work directly with founders, customers, the leading semiconductor ecosystem players. No layers, no ambiguity about impact.

What you'll do

• Manage active customer engagements: from IP and SoC architectural spec alignment through silicon and systems bringup and volume shipment milestones
• Ensure alignment with internal enginering and ecosystem partners — including foundries, OSAT/packaging houses, EDA vendors (Synopsys, Cadence), and IP partners
• Translate customer requirements (silicon architecture, interface specs, package form factor, delivery schedules) into internal program plans with clear owners and dates
• Build and maintain trackers, risk registers, and executive dashboards covering each engagement
• Drive gate reviews and weekly program syncs across internal RTL/DV, physical design, and validation teams
• Manage internal and external scoping and delivery timelines in coordination with technical and business teams
• Identify and escalate risks early; propose and implement mitigations before they become schedule threats

What you bring

• 15+ years of technical customer management experience in semiconductor, custom silicon, or chiplet/advanced packaging environments
• Experience interfacing with ecosystem partners — chip development schedules, interdepencies on EDA and IP, tape-out schedules and system bringup timelines
• Familiarity with silicon fabrication, advanced packaging formats: CoWoS, InFO, 2.5D/3D integration, substrate/interposer-based assembly
• Technical fluency in SoC or chiplet design flows — enough to understand RTL milestones, DV sign-off, PD handoffs, and silicon bring-up phases without needing translation
• Strong communication skills — comfortable presenting program status and risk posture to internal and external stakeholders
• Proficiency with program tracking tools (and spreadsheet-based trackers); experience building program infrastructure from scratch is a plus
• Familiarity with key connectivity IPs UCIe, PCIe Gen 5/6/7+, or high-bandwidth D2D interconnect standards is a strong plus

Nice to Have to Shine

• Prior experience at an IP company, chiplet startup, merchant silicon company, or systems company
• Background in AI/ML infrastructure silicon — accelerators, network switches, CPO-enabled platforms
• Exposure to EDA infrastructure programs (SNPS/CDNS cloud flows)